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Emerging Company Area

Attracts the latest solutions of Emerging companies from both home and abroad
This zoon consisting exhibition booth with Presentation stage and business meeting corner gives design developers the latest information faster. Look forward to your visiting!

Place In exhibition floor (Floor Plan)

Exhibitors of Emerging Company Area

*Joint participant company indented

[New program]
Emerging Company Guided Tour

In response to visitorís request to get to know more about oversea emerging companies and their latest technology, EDSFair organized the Emerging Company Guided Tour at EDSFair2008.

The tour guides who are expert at EDA introduced their technologies and solutions at the special stage in Japanese then took visitors to their booth in Emerging Company Area.

The tour guide helped communications between visitors and exhibitors at their booth.

Tour Schedule
Jan.24 (1)11:30-12:30

D/L Japanese doc.
D/L English doc.
D/L Japanese doc.
D/L English doc.
Jan.25 (1)13:00-14:00

D/L Japanese doc.
D/L English doc.
D/L Japanese doc.
D/L English doc.
Now, you can download each company's slide introduced at the tour.

* All contents on this website are the copyright of EDSFair organizer, authorship and information provider. Prohibit duplicating for personal use and quotation without the permission of the copyright owner.

Tour Guides
Jan.24 Mr. Tamotsu Hiwatashi, (Toshiba Semiconductor Company)
Jan.25 Mr. Kenji Yoshida, (D2S)

Emerging Company Presentation

Emerging Company Exhibitors make a presentation one after another at the Special Presentation Stage at the site. Learn more about the interesting solutions at their booth in Emerging company area nearby the stage.

Jan.24 12:00-12:20
1.Improve Design Performance and Yield
(113)MunEDA GmbH
Mr. Andreas Ripp
Sales & Marketing, Vice President
2.Verification Closure
Mr. Ravi Shankar
Managing Director of AXIOM Indian Operations
Jan.24 15:10-15:30
3.Clock-Tree Synthesis for Nanometer Design
(219)AZURO, INC.
Mr. Marc Swinnen
Director of Product Marketing
4.Variation Robustness for Analog/Mixed-Signal, Custom Digital and Memory Design
(116)Solido Design Automation
Mr. Patrick Drennan, Ph.D.
Chief Technology Officer
Jan.25 11:35-11:55
5.Next-Generation Multithreaded Mixed A/D Fast-SPICE
Mr. Dino Caporossi
Marketing, VP Marketing
6.Planning for Success: System Physical Prototyping, Solving implementation issues early
Mr.Matthew Raggett
Chairman & Cofounder
Jan.25 11:55-12:15
7.Terasic's FPGA products
(115)Terasic Technologies,Inc.
(To Be Announced)
8.System-level power simulation, analysis and modeling
(108)ChipVision AG
Mr. Tom West
Application Engineer
Jan.25 12:15-12:35
9.New product release~The smallest arithmetic circuit IP in the world
Mr. Masao Watari
President & CEO
10.ESL-IP/SOC register design environment for reducing design iteration due to spec miscommunication
Mr. Simon Rance
Director of Applications and Services
Jan.25 13:25-13:45
11.Details of Stratix III PCI Express x8
(To Be Announced)
12.Addressing the Impact of Process Variability on Your Design
(211)Ponte Solutions Inc.
Mr. Richard Nakajima
President of Cubic Micro Japan (Japan Representative Company for Ponte Solutions.)
Jan.25 15:40-16:00
13.Rapid electromagnetic simulation for advanced electronic packaging
Mr. Vikram Jandhyala
CEO and Founder, Physware, Inc. & Associate
Professor, Department of Electrical Engineering and Director, Applied
Computational Engineering Lab, University of Washington, Seattle
14.Micrologic's EDA Technology
Mr. Shlomo Corem
Sales and Marketing - Regional Sales Director