Home » Exhibition Regulations

Exhibition Regulations

1.Scope of Exhibits

1.1. Hardware solutions

1.2. Hardware development (EDA)
  1. IC design tools
    System level design (higher than RTL), logic design (RTL to net list), logic verification, analog design/verification, physical implementation, physical verification/analysis, signal integrity analysis,test (DFT/BIST/ATPG/others), DFM (OPC/RET/PSM/LRC/TCAD/others) and others
  2. PCB design tools
    Schematic capture, PCB layout, PCB signal integrity, analog design/verification and others
  3. System in package (Sip) tools

1.3 Software solutions
Embedded OS, device drivers, firmwear/middleware and others

1.4 IC tester/analyzer
IC testers, PCB testers, analyzers and others

1.5 IP core, macro, cell libraries

1.6 Embedded processor development environments
Reconfigurable processors, ICE, debuggers, microcomputer CASE, compilers/cross compliers, simulators, hardware/software co-design environments and others

1.7 Design service-related
Design houses/design services, design consulting, IP distribution services and others

1.8 Design infrastructure (WS/PC, Network)

1.9 Design data management tool

1.10 Mask shop, foundry

1.11 University (R&D), consortium

1.12 PR-related
Publications and others

2 Eligible Exhibitors

2.1 Manufacturers, trading companies, publishing companies and organizations with operations applicable to Section 1 above.

2.2 Applications through representatives such as advertising agencies will not be accepted.

3 Configuration and Number of Booths

Configuration No. of booths applied for
1 row 1, 2, 3, 4, 5, 6
2 rows 4,6,8,10,12
3 rows 9,12,15,18
4 rows 16
Blocks 20,25,30,35,40,45,50