Electronic Design and Solution Fair 2009
ALTOS DESIGN AUTOMATION [Emerging Company Area] 206
Location 4020 Moorpark Ave., #100, San Jose
Contact info Jim McCanny
Exhibit introduction Altos Design Automation Inc. provides ultra-fast characterization technology for standard cells, I/Os, mega-cells and memory. Altos' uses proprietary "inside view" methods to ramatically improve throughput (typically >5X faster than competing solutions) and ease of use. Liberate Altos' standard cell and IO characterization solution supports advanced timing, noise and power models (CCS,ECSM) and the latest Liberty low power constructs (UPF). Variety, Altos' statistical timing characterization tool generates statistical timing analysis models for multiple statistical timing tools including support for both global and local variation. Altos technology has recently been extended to support embedded memory characterization including the generation of advanced timing and noise models (CCS, ECSM) and statistical memory models. In addition, Altos provides standard cell library validation to ensure that library models are accurate when used with downstream analysis tools.


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