Electronic Design and Solution Fair 2009
 
SPINNAKER SYSTEMS INC./Verific Design Automation/Silicon Design Solution 805
 
 
Location Shin-Yokohama Square Bldg.11F, 2-3-12 Shin-Yokohama, Kouhoku-ku, Yokohama
222-0033
Contact info IP Business Dept
TEL:045-478-3803
FAX:045-478-3809
E-mail:info1@spinnaker.co.jp
URL:http://www.spinnaker.co.jp
Exhibit introduction [Joint exhibition]
# Verific Design Automation #
Industry standard HDL frontend (VHDL/Verilog2001/SystemVerilog)

# Silicon Design Solution #
Memory IP(SRAM,ROM,CAM & TLB) & Design Service

[EDA]
# SystemC/ANSI-C Behavioral Synthesis DesignPrototyper(TechnoLepo)

# Multi-FPGA board with HW/SW co-simulation NEXT(new)(Dynalith Systems)

# Customize EDA tools (Synthesis & STA) (SynApps Softwares)ˇˇ

[IP]
Image : H.264, MPEG2, MPEG4, JPEG, JPEG2000
Audioˇˇ: aacPlus, APT-X, WMA, MPEG Layer-I/II/III
Wireless : WLAN 802.11 a/b/g/n, Bluetooth2.1+EDR, UWB
Encription : AES,DES/3DES, IPSec, Digital Copyright Management
Hi-speed I/O : USB2.0/3.0PHY, EthernetPHY, PCIe, PHY, LVDS
CPU : R8051XC, Z80, 68000, 80186
Others : PDK & Process variation check, Solder Joint BIST, Embedded FPGA IP
   
   



 




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