Electronic Design and Solution Fair 2009
ASIP Solutions, Inc. [JEVeC Village] 405
Location A-308 Center for Advanced Science and Innovation,
Osaka University 2-1 Yamadaoka, Suita, Osaka
565-0871, Japan
Contact info Sales Division
Exhibit introduction New Product
Processor Design Revolution!
Using ASIP technology, processors can be designed to be best suited for specific applications with high performance low power consumption. ASIP Meister is an application specific instruction set processor development environment.
With ASIP Meister, by specifying the targeted processor architecture specifications and the micro behaviour of the instructions, high quality HDL description language (VHDL, Verilog HDL) and software development tools (compiler, assembler, debugger...) can be automatically generated. Consequently, processors best suited for specific applications and the corresponding program development tools can be developed in very minimal time.
In this exhibition, ASIP Meister and the designs of processors adopting ASIP Meister models will be introduced. Furthermore, optional products such as Test Bench Generator and a Profiler Gererator will also be exhibited.


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