Electronic Design and Solution Fair 2009
 
Gem Design Technologies, Inc. [JEVeC Village] 411
 
 
Location 1-8 Hibikino, Wakamatsu, Kitakyushu, Fukuoka, Japan
808-0135
Contact info Gem Design Technologies, Inc.
Hiroshi Murata
TEL:093-691-0030
FAX:093-691-0036
E-mail:murata@gemdt.com
URL:http://www.gemdt.com
Exhibit introduction World First
We present the latest version of SiP Feasibility Study Tool "GemPackage". This product enables you to examine if your SiP is possible, before going into the detailed design phase, by providing following functionalities.
- Quick wire/FC bonding design
- Semi-auto interposer routability analysis
- Chip-Package-Board super hierarchical view
- 3D observation using Google Earth/SketchUp
- Link to CAD systems (Cadence APD)
- Link to EM analysis tools (Ansoft HFSS,TPA,etc)
- For FBGA, PBGA, SiP, MCM, PoP, Si-Interposer
   
   



 




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