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 Exhibitor Detail : ENTASYS DESIGN INC.
305 

ENTASYS DESIGN INC.
World First

Exhibit introduction

Entasys provides an ESL(Electronic System Level) SVP(Silicon Virtual Prototyping) solution to fill the technology gap between ESL and IC implementation designers. Architecture level and RTL(Register Transfer Level) power estimation and floorplanning enable you to predict the design problems of IC implementation and package design interface.
Entasys will demonstrate the flexible IO pad configuration including optimization of the number and the location of power pad and feasibility analysis capability for flip-chip design with power aware ESL design planning solution.

* Product List
- Pillar-DP-Creo : Top Integrator
- Pillar-DP-Optima : Pad Configuration Optimizer
- Pillar-DP-Ventus : Architecture Level SVP Tool
- Pillar-DP-Navis : Early RTL Exploration and SVP Tool
- Pillar-DP-Inspector : Post Layout Design Explorer


Contact info

JeongHwan Yoon/ VP of Engineering
TEL:82-2-2040-7540
FAX:82-2-2040-7541
E-mail:jhyoon@entasys.com
URL:http://www.entasys.com

Address

928, Hyundai Venture-Vill
713, Suseo-Dong, Gangnam-Gu, Seoul, Korea
135-539

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