• Home
  • What's EDSFair
  • Exhibitors
  • Exhibitor Seminar Search
  • Special Stage
  • Special Zone
  • FPGA/PLD Design Conference
  • Access / Accommodation
  • Press Room
  • Contact

 Exhibitor Detail : The University of Aizu Saito Laboratory
216 

The University of Aizu Saito Laboratory

Exhibit introduction

Compared to synchronous circuits where circuit components are controlled by a global clock signal, asynchronous circuits where circuit components are controlled by pairs of local handshake signals are potentially low power consumption. This is because operations are executed when required. However, the design of asynchronous circuits is much more difficult than the design of synchronous circuits. Nevertheless, the design environment for asynchronous circuits is not reached to enough level. Therefore, design automation is very important for asynchronous circuits. In our laboratory, we mainly research design automation of asynchronous circuits. We are going to introduce our developed CAD tools with demonstration. In addition, we are going to introduce design examples using our CAD tools.


Contact info

The University of Aizu
TEL:0242-37-2576
FAX:0242-37-2598
E-mail:hiroshis@u-aizu.ac.jp
URL:http://cldr02.u-aizu.ac.jp

Address

Tsuruga, Ikki-machi, Aizu-Wakamatsu, Fukushima
965-8580

Back to exhibit list