Exhibitor Detail : ICScape


Exhibit introduction

ICScape provides Electronic Design Automation (EDA) tools addressing critical design topics such as multi-mode multi-corner (MMMC) clock tree analysis and optimization, MMMC Timing ECO, leakage power reduction for multi-million-gate nanometer designs and parasitic extraction and analysis for Analog/Mixed Signal designs. ICScape's products are in use at leading semiconductor, fabless IC, and design service companies worldwide with tape-outs in advanced 40nm technology. Exhibited products at EDS Fair include:

ClockExplorer: Comprehensive multi-scenario System-On-Chip (SOC) clock tree analysis, constraint verification and optimization, and clock schematic generation.

TimingExplorer: MMMC physical aware timing closure solutions with hold time fix, setup time fix, design rule violations (DRV) fix and optimized leakage power reduction.

RCExplorer: Early layout parasitic extraction and early design closure solution.

Skipper: Chip integration tool capable of handling huge size GDS on typical machines.

Contact info

Bill Chou
Sr. Application Engineering Manager


2150 Trade Zone Boulevard, Suite 107, San Jose, CA 95131, USA

Back to exhibit list

My page


Media Partners


EDN Japan


EE Times Japan

Concurrently Held Events

Page Top

Exhibitors | Privacy Policy | Contact | About copyright | Venue Access | Site Map