Exhibition Outline

Open the door! to the future

It has now been three years since EDS Fair started to be held at the same time as ET. During this time, the importance of software and hardware co-design and co-verification has been increasing on a daily basis. The major direction in the industry is “overall optimization.” It has become vital to optimize the entire system from the initial design stage with timing design, power-saving design, noise design and thermal design. This optimization of the entire system includes not only the interior of the LSI but also the packaging, printed circuit boards, equipment and software. In line with this change, new challenges are being demanded of all designers. It has become essential to pioneer new technological fields, review modeling and optimization techniques, and train engineers who have more skills than ever before. In these changing times, the EDS Fair 2013 will offer support for the challenges of all designers while providing an exhibition and projects that will lead to a bright future. Let’s everyone open the door to the future all together!

  • Name:
    Electronic Design and Solution Fair 2013 (EDSFair2013)
  • Concurrently held event
    Embedded Technology 2013
  • Date
    Wednesday, November 20, 2013 to Friday, November 22, 2013 (3days)
  • Place
     
    Pacifico Yokohama Exhibition Hall and Annex Hall
    Minato Mirai 1-1-1, Nishi-ku, Yokohama City, 220-0012, Japan
  • Time
     
     
     
    Wednesday, November 20 : 10:00 a.m. to 5:00 p.m.
    Thursday, November 21 : 10:00 a.m. to 6:00 p.m.
                                             ( 5:00p.m. to 6:00 p.m. Happy Hour (schedule))
    Friday, November 22 : 10:00 a.m. to 5:00 p.m.
  • Admission


    Registration required
    ・ Visitor registration at the Gate : ¥1,000
    ・ Online pre-registration/Invitational registration at the Gate : Free
  • Organizer
    JEITA Japan Electronics and Information Technology Industries Association (JEITA)
  • Cooperation
    Electronic Design Automation Consortium Electronic Design Automation Consortium (EDAC)
  • Support




    Ministry of Economy, Trade and Industry
    United States Embassy of Japan
    Distributor’s Association of Semiconductors & components of Japan(DAFS)
    Yokohama City
    (expected, no particular order)
  • Assistance

     
     

    Japan Embedded Systems Technology Association (JASA)
    Institute of Electronics, Information and Communication Engineers (IEICE)
    Information Processing Society of Japan (IPSJ)
    Japan Electronics Packaging and Circuits Association (JPCA)
    (expected, no particular order)
  • Management
    Japan Electronics Show Association (JESA)

Exhibits

Hardware solutions
System LSI
ASIC/ASSP
MPU/MCU/DSP
FPGA/PLD
others
Hardware development (EDA)
IC design tools
System level design (higher than RTL)
Logic design (RTL to net list)
Logic verification
Analog design/verification
Physical implementation
Physical verification/analysis
Signal integrity analysis
Test(DFT/BIST/ATPG/others)
DFM (OPC/RET/PSM/LRC/ TCAD/others)
ASIC Prototyping
others
PCB/SIP design tools
Schematic capture
Analog design/verification
Layout
Signal Integrity/Power Integrity/EMC analysis
Electromagnetic field analysis
Thermal analysis
others
Software solutions
Embedded OS
Device drivers
Firmware
Middleware
Virtual platform Development
others
IC tester/analyzer
IC testers
PCB testers
Analyzers
others
IP core, Macro, Cell libraries
Embedded processor development environments
Reconfigurable processors
ICE
Debuggers
Microcomputer CASE
Compilers/cross compliers
Simulators
Hardware/software co-design environments
others
Design service-related (LSI/PCB)
Design houses
Design services
Design consulting
Prototyping/manufacturing
IP distribution services
others
Design infrastructure (WS/PC, Network)
Design data management tool
Design data management
others
Mask shop, Foundry
University (R&D), Consortium
PR-related
Publications
others

Organizer

Concurrently Held Events

Embedded Technology 2013

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